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基于AXI总线的可配置LVDS控制器设计与验证
2021年电子技术应用第6期
蒙宇霆,袁海英,丁 冬
北京工业大学 信息学部微电子学院,北京100124
摘要: 针对不同应用场景下LVDS通信协议体现在数据位宽、帧格式和存储方式的选择差异性和数据收发灵活性,提出一种基于AXI总线的可配置LVDS控制器设计与验证方案。为了实现对LVDS控制器的精确控制,增加基于APB接口的可配置寄存器模块,在SoC系统上由软件控制数据传输,有效提高了数据收发的灵活性;为了提高传输效率并广泛适应场景需求,将与内存交互的接口定义为AXI协议接口;为了避免传输数据错误和数据包丢失等现象,在自定义协议中加入奇偶校验功能并在电路中加入数据包检查机制。随后,采用高效的回环验证方案针对LVDS控制器进行功能测试。实验结果表明该LVDS控制器基于AXI接口准确高效地实现了对端设备之间的数据收发功能,这种可配置的数据传输电路设计和验证方案灵活可行,便于广泛应用到视频图像数据传输系统中。
中圖分類號(hào): TN919.3
文獻(xiàn)標(biāo)識(shí)碼: A
DOI:10.16157/j.issn.0258-7998.201211
中文引用格式: 蒙宇霆,袁海英,丁冬. 基于AXI總線的可配置LVDS控制器設(shè)計(jì)與驗(yàn)證[J].電子技術(shù)應(yīng)用,2021,47(6):40-45,56.
英文引用格式: Meng Yuting,Yuan Haiying,Ding Dong. Design and verification of a configurable LVDS controller based on AXI bus[J]. Application of Electronic Technique,2021,47(6):40-45,56.
Design and verification of a configurable LVDS controller based on AXI bus
Meng Yuting,Yuan Haiying,Ding Dong
School of Microelectronics,Faculty of Information Technology,Beijing University of Technology,Beijing 100124,China
Abstract: In view of the differences of data bit width, frame format and storage mode and flexibility of data transmission in different application scenarios,a configurable LVDS controller based on AXI bus was proposed. In order to achieve precise control of LVDS controller, a configurable register module based on APB interface was added, and data transmission was controlled by software on the SoC system, which effectively improved the flexibility of data transmission and reception. In order to improve the transmission efficiency and widely adapt to the scenario requirements, the interface that interacts with the memory is defined as the interface of the AXI protocol. In order to avoid data transmission errors and packet loss, a parity function was added to the custom protocol and the packet checking mechanism was added to the circuit. Then, an efficient loopback verification scheme was used to perform functional tests on the LVDS controller. The experimental results show that the LVDS controller based on AXI interface can accurately and efficiently realize the data transmission and reception function between the peer devices. This configurable data transmission circuit design and verification scheme is flexible and feasible, so that it can be widely used in video image data transmission.
Key words : AXI bus;LVDS controller;high-speed interface;configurable module;data transceiver

0 引言

    復(fù)雜電子系統(tǒng)設(shè)計(jì)對(duì)數(shù)據(jù)傳輸速率的要求日益嚴(yán)格,也帶來(lái)高功耗、高成本等問(wèn)題,低壓差分信號(hào)(LVDS)[1]是一種高性能數(shù)據(jù)傳輸技術(shù),它是速度、成本和功耗之間的最佳折中方案。在物理層電路設(shè)計(jì)方面,LVDS的低壓擺幅(250 mV~450 mV)和快速過(guò)渡時(shí)間可以使數(shù)據(jù)傳輸速率達(dá)到100 Mb/s~3 Gb/s,能夠滿足現(xiàn)代復(fù)雜系統(tǒng)設(shè)計(jì)中對(duì)數(shù)據(jù)傳輸?shù)男枨蟆4送?,這種低壓擺幅可以降低功耗消散,具備差分遠(yuǎn)距離傳輸[2]的優(yōu)點(diǎn)。在當(dāng)今大量數(shù)據(jù)傳輸?shù)闹T多場(chǎng)景中,如芯片間的信息傳輸[3-4]、視頻圖像處理[5-6]、光通信[7]和LCD面板[8]等,LVDS已成為最有前景的解決方案之一。在數(shù)字邏輯功能設(shè)計(jì)方面,由于需求、協(xié)議和應(yīng)用場(chǎng)景的差異[9-10],設(shè)計(jì)人員存在大量重復(fù)性的設(shè)計(jì)、調(diào)試工作。為提高系統(tǒng)開發(fā)效率,解決平臺(tái)間的兼容性問(wèn)題,通常在FPGA平臺(tái)上實(shí)現(xiàn)LVDS高速接口設(shè)計(jì)[11-13],文獻(xiàn)[11]在FPGA上實(shí)現(xiàn)了LVDS總線控制器,解決了多節(jié)點(diǎn)高速通信的故障隔離問(wèn)題;文獻(xiàn)[12]實(shí)現(xiàn)了LVDS接口的收發(fā)單元設(shè)計(jì),在收發(fā)通路中加入數(shù)據(jù)與時(shí)鐘對(duì)齊機(jī)制,提高了平臺(tái)兼容性,并在FPGA上驗(yàn)證了方案。文獻(xiàn)[14]通過(guò)FPGA設(shè)計(jì)了一種基于LVDS接口的高速并行數(shù)據(jù)傳輸系統(tǒng),并應(yīng)用于實(shí)際專用網(wǎng)絡(luò)交換模塊。在實(shí)際芯片工程中,考慮到當(dāng)LVDS控制器集成到SoC系統(tǒng)上時(shí)存在兼容性問(wèn)題,軟硬件間應(yīng)有更高的操作靈活度,系統(tǒng)各模塊間數(shù)據(jù)傳輸應(yīng)高速穩(wěn)定。因此,為了提高系統(tǒng)可靠性,降低成本,設(shè)計(jì)一種高靈活度、高性能的LVDS控制器具有很高的價(jià)值。




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作者信息:

蒙宇霆,袁海英,丁  冬

(北京工業(yè)大學(xué) 信息學(xué)部微電子學(xué)院,北京100124)




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