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一种宽输入范围高PSR带隙基准电路设计
电子技术应用
李思源1,李亚军2,张有涛2,钱峰2
1.南京电子器件研究所;2.南京国博电子股份有限公司
摘要: 从DC-DC芯片电路的实际设计需求出发,设计了一款输入电压范围在2.5~15 V的带隙基准电路。通过预调节电路的设计,带隙基准核输出的基准电压转化为一个稳定的电流源,形成的负反馈结构给带隙基准核自身提供供电电压,提高了电源电压范围上限;通过电压选择电路,在电源电压低于5 V时使带隙基准核直接由电源电压供电,拓宽了电源电压范围的下限。同时,预调节电路和带隙基准核中共源共栅结构为电路带来了良好的电源抑制特性。设计基于0.25 μm BCD工艺,完成了原理图、版图设计以及仿真,结果表明设计在-55 ℃~125 ℃的温度范围内,可以输出稳定的0.8 V电压,温度系数为7.78 ppm/℃;低频条件下PSR达到159 dB,线性调整率为0.001 2%。
中圖分類號:TN402 文獻標(biāo)志碼:A DOI: 10.16157/j.issn.0258-7998.234751
中文引用格式: 李思源,李亞軍,張有濤,等. 一種寬輸入范圍高PSR帶隙基準(zhǔn)電路設(shè)計[J]. 電子技術(shù)應(yīng)用,2024,50(4):38-43.
英文引用格式: Li Siyuan,Li Yajun,Zhang Youtao,et al. Design of a wide-input-range and high-PSR bandgap reference[J]. Application of Electronic Technique,2024,50(4):38-43.
Design of a wide-input-range and high-PSR bandgap reference
Li Siyuan1,Li Yajun2,Zhang Youtao2,Qian Feng2
1.Nanjing Electronic Devices Institute; 2.Nanjing Guobo Electronics Co., Ltd.
Abstract: Based on the actual design requirements of DC-DC chip circuit, this paper designs a bandgap reference circuit with an input voltage range of 2.5~15 V. Through the design of the pre-regulator circuit, the reference voltage output by the bandgap reference core is transformed into a stable current source, and the negative feedback structure is formed to provide a power supply voltage for the bandgap reference core itself, thus increasing the upper limit of the power supply voltage range. Through the voltage selection circuit, the bandgap reference core is directly powered by the power supply voltage when the power supply voltage is lower than 5 V, which broadens the lower limit of the power supply voltage range. At the same time, the pre-regulator circuit and the cascode structure in the bandgap reference core brings good power supply rejection performance to this circuit. This design is based on 0.25μm BCD process, and the schematic diagram, layout design and simulation of the circuit are completed. The results show that this design can output a stable voltage of 0.8 V in the temperature range of -55℃~125℃, and the temperature coefficient is 7.78 ppm/℃. At low frequency, the PSR reaches 159 dB, and the line sensitivity is 0.001 2%.
Key words : bandgap reference;PSR;pre-regulator;voltage selection circuit

引言

大功率射頻組件需要較寬輸入范圍的電源管理模塊,如DC-DC、LDO、電荷泵等。其中,基準(zhǔn)電壓的穩(wěn)定、精度及電源抑制(Power Supply Rejection, PSR)特性決定了DC-DC模塊整體性能的優(yōu)劣。

近年來,對于寬輸入電壓范圍基準(zhǔn)電路結(jié)構(gòu)的研究不在少數(shù),例如:文獻[1]通過威爾遜反饋電流源的設(shè)計極大地提高了電源電壓的輸入范圍;文獻[2]則通過NJFET結(jié)構(gòu)壓縮限流電路和壓控電流負(fù)反饋結(jié)構(gòu)對外部電源進行兩級限壓限流,提高了寬輸入范圍帶隙基準(zhǔn)的電源抑制特性;文獻[3]則依靠配合穩(wěn)壓二極管的電流源設(shè)計擴大了輸入電壓的上限。但能夠?qū)崿F(xiàn)在較低電源電壓(如3 V以下)至10 V以上電源電壓范圍內(nèi)正常工作的帶隙基準(zhǔn)電路較為少見。本文從寬輸入范圍DC-DC芯片設(shè)計的實際需求出發(fā),采用0.25 μm BCD工藝設(shè)計了一款電源電壓范圍為2.5~15 V的高PSR帶隙基準(zhǔn)電路。通過對預(yù)調(diào)節(jié)電路和電壓檢測電路的優(yōu)化,該帶隙基準(zhǔn)電路得以在較低和較高輸入電壓的范圍內(nèi)都正常工作,并具備優(yōu)秀的電源抑制性能。


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作者信息:

李思源1,李亞軍2,張有濤2,錢峰2

(1.南京電子器件研究所,江蘇 南京 210016;2.南京國博電子股份有限公司,江蘇 南京 211111)


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